1. Field of the Invention
The present invention relates to semiconductor integrated circuit devices, and particularly to a semiconductor integrated circuit device using BiCMOS technology.
2. Description of the Background Art
The BiMOS is a kind of circuit structure system in which a bipolar element and a MOS element are mixedly provided on the same chip, and is LSI technology in which a bipolar IC performing analog processes and an MOS IC performing digital processes with low consumption power are provided mixedly on the same chip.
The bipolar IC has an advantage that it can process high frequency signals and operate at high speed because it can perform analog processings with high accuracy and has large current driving capability. On the other hand, however, it has a disadvantage that the input impedance is low and consumption power is large. On the other hand, MOS IC has an advantage that the integrity level and input impedance are high but has a disadvantage that it is not suitable for analog processings.
Accordingly, a circuit configuration method, the BiMOS has been devised in order to realize semiconductor integrated circuit devices having advantages of both of bipolar IC and MOS IC. In order to make the most of strong points of both of the bipolar IC and the MOS IC, in a semiconductor integrated circuit device of BiMOS structure, a circuit portion for outputting TTL level signals includes a bipolar element and a MOS element, for example.
In the specification and drawings, N1-N80 denote N-channel MOS field effect transistors (NMOS transistors), and P1-P35, P61-P74 denote P-channel MOS field effect transistors (PMOS transistors). Also, B1-B22 denote NPN-type bipolar transistors.